Abstract
With the development of the technology of munication, researches in the field of radio and munication integrated circuits e more and more active. In many RF processes (GaAs, Si Bipolar, CMOS), CMOS RF process is widely applied gradually for its high integrated density, low cost. All of ponents, such as low noise amplifiers, mixer, local oscillators, and IF filters, seem possible to be integrated in CMOS scaled technology, front-to-back throughout the munications systems. Voltage controlled oscillator(VCO) is an important block of the RFICs, the phase noise of which affect the selectivity and sensitivity of the transceivers. Thus the low phase noise design technology of VCO is one of the significant research topics in RFIC design field. Especially the design of low noise wideband CMOS VCO is still a huge challenge.
The main objective of this paper is to design a CMOS VCO that can meet the design demand of IEEE WLAN receiver. In the first part, this paper presents the research state of VCO and gives the specification of this design. Then the paper analyzes the VCO design theory in details, including the oscillator working theory, VCO performance specification, VCO architectures, some design tips on designing inductors and varactors and the phase noise model of Leeson and Hajimiri. And based on these, we make a research on the techniques of optimizing the VCO phase noise. Then goes on to the design of the subject to achieve the program objectives and specific, that is, using plementary MOS cross-coupled oscillator as the core control circuit, by adjusting the PMOS and NMOS width tube length to optimize the oscillator output waveform and phase noise, using the harmonic filter resistor technology and source technology with the feedback resistor to reduce noise and power consumption, and designed peripheral circuit to ensure that the oscillator is always stable in the required state. Oscillating swing amplitude of VCO determines the phase noise perfor
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