SECTION 3
HIGH RESOLUTION
SIGNAL CONDITIONING ADCs
Sigma-Delta ADCs
High Resolution, Low Frequency
Measurement ADCs
1
SECTION 3
HIGH RESOLUTION SIGNAL
CONDITIONING ADCs
Walt Kester, James Bryant, Joe Buxton
The trend in ADCs and DACs is toward higher speeds and higher resolutions at
reduced power levels. Modern data converters generally operate on ±5V (dual
supply) or +5V (single supply). There are now a few converters which operate on a
single +3V supply. This trend has created a number of design and applications
problems which were much less important in earlier data converters, where ±15V
supplies were the standard.
Lower supply voltages imply smaller input voltage ranges, and hence more
susceptibility to noise from all potential sources: power supplies, references, digital
signals, EMI/RFI, and probably most important, improper layout, grounding, and
decoupling techniques. Single-supply ADCs often have an input range which is not
referenced to ground. patible single-supply drive amplifiers and dealing
with level shifting of the input signal in direct-coupled applications also es a
challenge.
In spite of these issues, components are now available which allow extremely high
resolutions at low supply voltages and low power. This section discusses the
applications problems associated with ponents and shows techniques for
essfully designing them into systems.
LOW POWER, LOW VOLTAGE ADC DESIGN ISSUES
Low Power ADCs typically run on 5V, +5V, +5/+3V, or +3V
Lower Signal Swings Increase Sensitivity to All Types of Noise
(Device, Power Supply, Logic, etc.)
Device Noise Increases at Low Quiescent Currents
Bandwidth Suffers as Supply Current Drops
mon-Mode Range May be Limited
Selection of Zero-Volt Input/Output Amplifiers is Limited
Auto-Calibration Modes Highly Desirable at High Resolutions
Figure
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SIGMA-DELTA ADCS
(COURTESY OF JAMES M. BRYANT)
Because Sigma-Delta is such an important and popular architecture f
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