edge体系结构指令静态映射算法分析.docx

Abstract
Along with the development of modern semiconductor industry, and the level of integration of the chip, computer architecture design tends to divide processor into tiles. The huge demand of processor performance drive the architecter to fully exploit the program’s ILP . Under these background,EDGE (Explicit Data Graph Execution) architecture is execution, static placement dynamic issue is the characteristics of EDGE. Subdivided structure of EDGE need a kind of mechanism to map instructions to the hardware, thus how to design the mapping method to achieve optimal performance for EDGE architecture is of great significance.
This paper summarizes the advantages and disadvantages of the existing scheduling algorithm and analyzes all the factors that affect the performance of on the principle that increasing bypass on node can reduce the amount munication,this paper put forward and realized a Dependenece-First scheduling algorithm, namely DF algorithm. We evaluated and improved the DF test results show that DF scheduling algorithm at most achieved 13% higher performance than the existing best scheduling algorithm while on average this ratio e 2%.This result show that DF algorithm can speed up application program’s analysising plexity of the algorithm we found that
both DF and SPS algorithm have plexity of O (i2).
At the end of this paper,pare the performance of DF algorithm when using different doubled the bandwidth of bypass work while using the same DF algorithm. and we discussed how the hardware affectes the DF algorithm based on the exploring the experiment’s data,we found that the bandwidth of bypass work do affect the effectiveness DF we concluded that the bottleneck of performance is the bypasswidth of TRIPS paring with work achieved extra 10% improvement by double the bypasswidth when using the same binary which DF algorithm produced..
Keywords: EDG