毕业设计论文
高速数据采集系统
信息技术学院
电子信息科学与技术
姓名:陈
指导教师:
高速数据采集系统
作者:陈玲指导教师:
论文摘要:介绍了一种基于FPGA(现场可编程门阵列)和FIFO(先入先出存储器)的多通道高速A/D数据采集系统的设计方法,并给出了这种数据采集方法的硬件原理电路和主要的软件设计思路。本系统的特点在于该系统在单片机的控制下实现高速数据采集,采样频率可达1~2 MHz。该系统可靠性高,抗干扰能力强,造价低廉。采用该设计方法所设计的数据采集系统不但可以实现高速采集多通道的数据,而且还可以扩展模拟量的输入通道数。对于一般的高速数据采集系统而言,除了采用高速的A/D转换器、高速存储器等高速器件之外,还要解决如何高速寻址、如何控制总线逻辑、如何进行高速存储以及如何方便地与PC机交换数据等问题。这些问题都是设计一个高速数据采集系统所要共同面对的问题。兼顾这些共性问题,笔者设计了一套以精确故障定位为目的的高速数据采集系统。
Abstract: Introduced based on a CPLD (complex programmable logic devices) and FIFO (first in first out memory), multi-channel high-speed data high-speed system design A/D methods, and methods of providing such data collection hardware circuit and the main principles of software design ideas. Characteristics of the system lies in the system of control in Chanpianji achieve high-speed data collection, sampling frequency to 1~2 MHz. The high reliability of the system, anti-interference capability is strong, prices are low. The design methodology used to design the data collection system can achieve high-speed multi-channel data acquisition, simulation, but can also expand the volume of a few passages. High-speed data acquisition system in general, in addition to using high-speed A/D, high-speed, high-speed memory devices, but also how to solve the high-speed Xinzhi, how to control the bus logic, how to facilitate high-speed storage and data exchange with a PC. These problems are designed to be a high-speed data acquisition mon problems. Both of mon problems, the authors designed a precise breakdown as to the purpose of high-speed data acquisition systems.
关键词:FPGA 高速数据采集系统单片机
目录
第一章绪论 2
2
第二章系统硬件设计 4
4
4
5
7
10
12
16
第三章系统设计原理及工作原理………………………………16
16
17
17
18
19
19
21
第四章数据采集软件设计 22
23
第五章结束语 24
第
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