毕业论文--高速PCB的通孔建模分析.doc

华北电力大学毕业设计论文 I 高速 PCB 的通孔建模分析摘要小体积、高性能成为当今电子产品的发展趋势,这种趋势决定了时钟频率将越来越高, 同时信号上升时间也将越来越短。在低频情况下,由互连线引起的寄生效应对电路性能的影响很小,但是在高速情况下,信号具有较高的有效带宽,互连线对通过其中的高速信号会产生反射、振铃, 对周围的信号走线产生串扰与祸合等, 引起一系列信号完整性问题(sI), 从而影响到整个系统的性能。而含有通孔不连续结构的互连线在高速电路中将会带来更严重的信号完整性问题与电磁干扰(EMI) 。因此,对其进行准确、快速、有效的电磁建模与仿真将变得极为重要。本文主要工作内容大致可以分为三部分:第一部分工作主要分析双层面完整通孔的机械结构并给出粗略计算通孔寄生电容、电感的公式,然后根据通孔的机械结构做出了完整通孔的电路建模,并用公式计算了通孔的寄生电容和电感。第二部分工作是使用 Ansoft HFSS 对双层面完整通孔进行三维电磁场建模仿真,观察分析仿真结果,并对结果做简要分析, 了解通孔对信号完整性的影响。第三部分工作主要是电感提取工具 Fasthenry 的使用, 对 Fasthenry 的输入文件语法进行详细的介绍说明,并使用 Fasthenry 提取微带线、 L 形微带线和通孔的电感,并给出提取结果。关键词:高速 PCB ;通孔;信号完整性华北电力大学毕业设计论文 II THE THROUGH-HOLE OF HIGH-SPEED PCB MODELING AND ANALYSIS Abstract It will be development trend that electronic products are ing miniaturization and high performance, which decides that the clock frequency will ing more and more higher and the rise time will ing more and more low frequency, the parasitical effects induced by interconnection lines have little influence on circuit performance. But in high-speed circuit the signal has wider effective bandwidth, so that the connection lines will induce reflection and ringing when transmitting the high-speed signal, and at the same time there are some crosstalk and coupling among connection lines and signal traces, which will induce a series of signal integrity (SI) problems and affect the whole system performance. The vias are discontinuous connections, which will induce more serious signal integrity problems and ic interference (EMI). So it is very important that vias are modeled and simulated accurately, speedily, efficiently. This article mainly work content can generally be divided into three parts: the first part of the work focused on the two-plete through-hole of mechanical structures and gives a rough calculation through-hole parasitic capacitance, inductance of the formula, and then by the through hole mechanics make plete circuit modeling through hole, and a formula to calculate a through hole of parasitic capa