英文资料翻译
题 puter Control Technology
系别中德机电学院
专业电气自动化技术
班级 xxxxxxxx
学生姓名 xxxxxxx
学号 xxxxxxxxx
指导教师 xxxxxxx
2012年 4 月
Computer Control Technology
puter structure and function
This section introduces the internal architecture of puter and describes how instructions are stored and interpreted and explains how the instruction execution cycle is broken down into its ponents.
At the most basic level, puter simply executes binary-coded results. For a general-purpose puter, four necessary elements are the memory, central processing unit (CPU, or simply processor), an external processor bus, and an input/output system as indicated in -1.
The memory stores instructions and data.
The CPU reads and interprets the instructions, reads the data required by each instruction, executes the action required by the instruction, and stores the results back in memory. One of the actions that is required of the CPU is to read data from or write data to an external device. This is carried out using the input/output system.
The external processor bus is a set of electric conductors that carries data, address and control information between the puter elements.
The memory
The memory of puter consists of a set of sequentially numbered locations. Each location is a register in which binary information can be stored. The “number” of a location is called its address. The lowest address is 0. The manufacturer defines a word length for the processor that is an integral number of locations long. In each word the bits can represent either data or instructions. For the Intel 8086/87 and Motorola MC6800 microprocessors, a word is 16 bits long, but each memory location has only 8 bits and thus two 8-bit locations must be accessed to obtain each data word.
In order to use the contents of memory, the processor must fetch the contents of the right location. To carry out a fetch, the processor places (enables) the binary-coded address of the desired location onto the address line
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