ARM开发板_原理图.pdf.pdf

1 2 34 A B C D 4 3 2 1 D C B A Title Number Revision Size A4 Date: 21-Oct-2009 Sheet of File: F:\ Drawn By: MICP 1 2 XRESET 3 DGND0 4 CVDD0 5 IOVDD0 6 CVDD1 7 DREQ 8 GPIO2/DCLK 9 GPIO3/SDATA 10 NC 11 NC 12 XDCS/BSYNC 13 IOVDD1 14 VCO 15 DGND1 16 XTALO 17 XTALI 18 IOVDD2 19 DGND2 20 DGND3 21 DGND4 22 XCS 23 CVDD2 24 NC 25 RX 26 TX 27 SCLK 28 SI 29 SO 30 CVDD3 31 TEST 32 GPIO0/SPIBOOT 33 GPIO1 34 NC 35 NC 36 AGND0 37 AVDD0 38 RIGHT 39 AGND1 40 AGND2 41 GBUF 42 AVDD1 43 RCAP 44 AVDD2 45 LEFT 46 AGND3 47 LINEIN 48 U3 VS1003B Y1 C19 20pF C20 20pF C36 C35 C34 2V8A C30 C31 C32 C33 AGND AGND 2V5 C27 C28 C29 3V3 R74 100K R75 100K R76 100K R77 100K 3V3 1 1 2 2 MK1 MIC C11 10uF R27 1K R26 1K C10 10uF 2V8A C14 100pF C6 1uF C7 1uF R29 1K R28 1K AGND C8 1uF C15 AGND AGND R66 470R C9 1uF AGND AGND R78 20R R79 20R R80 20R C16 C17 C18 RESET XDCS DREQ SPI2_SCK SPI2_MISOSPI2_MOSI PB15 PB14 PB13 XCS 3V3 C1 1uF IN 3 G 1 OUT 2 U1RT9166-2V8 C2 1uF 2V8 C3 1uF 2V8A R1 0R R2 0R AGND 3V3 C4 1uF IN 3 G 1 OUT 2 U2RT9166-2V5 C5 1uF 2V5 D11N4148 TP32V8 TP42V8A TP52V5 TP6 AGND AGND TP7 GND TP13V3 AGND 2V5 2V8A 2V8 3V3 R3 0R R4 0R R34 10K R35 10K 3V3 PC10 PC11 PC3 A 1 B 2 C 3 D 4 E 5 J1 MIC A 1 B 2 C 3 D 4 E 5 J2 LINE_IN A 1 B 2 C 3 D 4 E 5 J3 LINE_OUT AGND 1 2 34 A B C D 4 3 2 1 D C B A Tit