关于单片机的英文原文.doc

This paper presents the implementation of a fault detection and correction technique used to design a robust 8051 micro-controller with respect to a particular transient fault called Single Event Upset (SEU). A specific study regarding the effects of a SEU in the micro-controller behavior was performed. Furthermore, a fault tolerant technique was implemented in a version of the 8051. The VHDL description of the fault-tolerant microprocessor was prototyped in a FPGA environment and results in terms of area overhead, level of protection and performance penalties are discussed.
1. Introduction
The constant improvements achieved in the microelectronics technology allow the manufacturing of plex circuits, substituting boards or puters of the past 80’s. Nowadays, because of the microelectronics advances, traditional applications e cheaper and more reliable, while a large range of new applications can take advantage of integrated devices by using the so-called embedded systems. In all cases, architectures are strongly based on some kind of data processor, such as a micro-controller or a DSP processing unit, for example.
The continuous decrease in the semiconductor dimensions and in electrical features, leads to an increasing sensitivity to some effects of the environment (ionization due to radiation, ic perturbations, thermal,...) considered minor or negligible in the technologies