一种多接口协议弹性缓冲器优化设计方法.pdf

29 24 2021 12
cademy of
100049 3
Sciences，Beijing ，China； . Shandong Industrial Institute of Integrated Circuits Technology，
250001
Shandong Institutes of Industrial Technology，Jinan ，China）
Elastic buffers are widely used in the design of the physical layer of high ⁃ speed interface
Abstract:
protocols to solve data synchronization problems by clock phase frequency deviations when transmitting
across clock domains. Based on the analysis of the requirements of various interface protocols and a
constant half ⁃ full mechanism is used to design and implement a multiple pointer elastic buffer with
configurable parameters. The elastic buffer supports 10 bit 20 bit and 40 bit data width the minimum
， ，
depth is 8 the maximum read and write clock frequency is 500 MHz the current internal state of the
， ，
memory is determined by half⁃full check and the control characters are automatically added or deleted to
，